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32-bit MIPS CPU on FPGA

Independent implementation of a MIPS-based processor.

  • TypeEngineering
  • PeriodJul 2024
  • AffiliationCourse Engineering Project
  • StatusCompleted

Overview

Independently designed and implemented a 32-bit MIPS instruction-set computer system on FPGA.

  • Implemented a 32-bit MIPS instruction-set architecture system.
  • Completed the processor design independently as a core course project.
FPGAMIPSComputer Architecture

This public overview does not include private code, unpublished measurements, or confidential details from industry collaborations.