Bringing Torus to Real-World Tasks
Interconnect topology exploration under practical workload constraints.
- TypeResearch
- PeriodJul — Sep 2025
- AffiliationCourse Research Project
- StatusCompleted
Overview
Studied Torus and Bolza-graph interconnects as candidate Network-on-Chip architectures and evaluated them against real-world workloads.
- Proposed Torus and Bolza-graph topologies as architecture candidates.
- Built a simulator and performance evaluator for real-world workloads.
- Conducted power, performance, and area (PPA) analysis.
This public overview does not include private code, unpublished measurements, or confidential details from industry collaborations.